The present invention relates to a method for producing printed wiring boards (PWBs), especially double-side PWBs or multilayer PWBs.
Recently, a low cost multilayer PWB that enables high-density mounting of semiconductor chips such as LSIs has been desired for industrial machines as well as home electronic appliances. It is important for such multilayer PWBs to provide high quality electric connections between plural layers of wiring patterns formed at a fine spacing or pitch.
The conventional PWB that is produced by drilling, etching and plating a copper-foil laminated board cannot satisfy the above-mentioned need anymore for sophisticated electronic equipment having a number of functions. To solve such a problem, some methods are under development for producing PWBs that have a new structure and a high density of wiring.
One of the methods is a recent technique for forming a fine pattern that can be applied to a high-density surface mounting. This method for producing PWBs utilizes a plating technique and a transferring technique for the wiring pattern. Two metal sheets are prepared, each of which has a surface with a wiring pattern formed by electroplating of copper. A semi-hardened resin sheet such as a prepreg is placed between the wiring patterns of the metal sheets. Heat and pressure are applied to the outer surfaces of the metal sheets. Thus, the copper wiring patterns are transferred from the surfaces of the metal sheets to the surfaces of the resin sheet. After removing the metal sheets, through holes are formed by drilling in the resin sheet, and copper plating is performed inside the through holes to connect the wiring pattern on one side with that of the other side electrically (Naoki Hukutomi et al. "Development of Fine Pattern Wiring Technique", The Institute of Electronics, Information and Communication Engineers, C-II, Vol. J72-C-II, No. 4, PP243-253, 1989). This method provides a line width and a line space of 20 microns each.
There is another technique called "ALIVH" (a trademark of Matsushita Electric Industrial Co., Ltd.), that is a resin-based multilayer PWB having an inner via hole (IVH) structure for all layers. In this multilayer PWB, a conductive material is filled in the inner via holes instead of copper plating inside the through holes that is a major method for electric connection between layers of a multilayer PWB in the prior art. This "ALIVH" PWB thus improves the reliability of the electric connection between layers, and facilitates forming inner via holes under lands for mounting components or between any layers (U.S. Pat. Nos. 5,346,750 and 5,481,795).
An example of the method for producing the "ALIVH" PWB is explained below, referring to FIGS. 5A-5F that show cross sections in the producing process. As shown in FIG. 5A, via holes 502 are perforated by using a laser beam machine at predetermined positions in an adhesive insulator sheet 501 that comprises an aramid-epoxy prepreg made of a non-woven aramid sheet impregnated with an epoxy resin. Then, as shown in FIG. 5B, the via holes 502 are filled with a fluid conductive paste 503. Then, as shown in FIG. 5C, the adhesive insulator sheet 501 with via holes filled with the conductive paste is placed between copper foils 504, and heat and pressure are applied to the outer surfaces of the copper foils. Thus, the adhesive insulator sheet (the prepreg) 501 and the conductive paste 503 are hardened, the copper foils 504 adhere to the surfaces of the adhesive insulator sheet 501, and electrical connections are formed between the copper foils by the conductive paste 503 packed into the via holes 502. The copper foils 504 are etched by a conventional photolithography method to form wiring patterns 505a, 505b. Thus, a double-side PWB 506 is obtained as shown in FIG. 5D.
In the next step shown in FIG. 5E, the double-side PWB 506 is used as a core, and on both sides of the core PWB 506 other adhesive insulator sheets 501a and 501b are placed with proper registration. These adhesive insulator sheets 501a, 501b have been made previously according to the step shown in FIG. 5B, and each of them has via holes filled with the conductive paste at predetermined positions. On the outer surfaces of the adhesive insulator sheets 501a and 501b, copper foils 507a and 507b are placed. Heat and pressure are applied to both outer surfaces of the copper foils 507a, 507b for lamination. Then, similarly to the step of FIG. 5D, the outer copper foils 507a, 507b are etched by the photolithography method. Thus a four-layer PWB is obtained having the outer wiring patterns 508a, 508b as shown in FIG. 5F. This method for producing PWBs enables via-connections (electric connections between layers) with very small via holes since via holes are formed by a laser beam and filled with the fluid conductive paste for the electric connection.
However, in the above-mentioned transferring technique of the wiring pattern, there is a limit for reducing the size of through holes since they are perforated by machining. On the other hand, in the above "ALIVH" PWB, there is a limit on the fineness of patterns with respect to pattern density such as a line pitch and a line width since the outer and inner copper patterns are formed by the conventional photolithography method. These limits are obstacles to producing high density mounting of surface mount components, especially small electronic components such as recent chip components or LSI bare chips.